Investigation of various mesh architectures with broadcast buses for high-performance computing

VLSI Design

Volumn 9, Issue 1, 1999, Pages 29-54

  Ziavras, Sotirios G ^a,b,c  

^a NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

^b NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

^c IEEE   (United States)

Author keywords

Enhanced mesh; Mesh with multiple broadcast; Parallel algorithms; Parallel computer architectures; Store and forward routing; Wormhole routing

Indexed keywords

COMPUTER ARCHITECTURE; COST EFFECTIVENESS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS;

MESH-CONNECTED ARCHITECTURES; STORE-AND-FORWARD ROUTING; WORMHOLE ROUTING;

VLSI CIRCUITS;

EID: 0032627965     PISSN: 1065514X     EISSN: None     Source Type: Journal    
DOI: 10.1155/1999/29035     Document Type: Article

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