Transformation for computational latency reduction in turbo-MAP decoding

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 1999, Pages

  Raghupathy, Arun ^a   Liu, K J Ray ^a  

^a QUALCOMM INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DECODING; VLSI CIRCUITS;

COMPUTATIONAL LATENCY;

COMPUTER AIDED NETWORK ANALYSIS;

EID: 0032626835     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (9)