Generic VHDL implementation of a PCNN with loadable coefficients

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3728, Issue , 1999, Pages 186-197

  Millberg, Mikael ^a   Oberg, Johnny ^a   Waldemark, Joakim ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE DESCRIPTION LANGUAGES; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE PROCESSING; ITERATIVE METHODS; MATHEMATICAL TRANSFORMATIONS;

PULSE COUPLED NEURAL NETWORKS (PCNN); VERILOG HARDWARE DESCRIPTION LANGUAGE (PCNN);

NEURAL NETWORKS;

EID: 0032625545     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (19)