2.5 Ω/□ W/TiN/poly stack gate technology for high density and embedded DRAM technology

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 1999, Pages 247-250

  Hu, Yin ^a   Anderson, Dirk ^a   Rotondaro, Antonio ^a   Obrien, Sean ^a   Hsu, Wei Yung ^a   Kraft, Robert ^a   Tiner, Paul ^a   Nicollian, Paul ^a   Aur, Shiann ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELLULAR ARRAYS; CMOS INTEGRATED CIRCUITS; ELECTRIC RESISTANCE; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; NITRIDES; OXIDES; RELIABILITY; SEMICONDUCTOR DEVICE MANUFACTURE;

EMBEDDED DRAM TECHNOLOGY; GATE OXIDE THICKNESS; POLYGATE STACK TECHNOLOGY;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0032599158     PISSN: 1524766X     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (11)