Hysteresis in floating-body PD/SOI CMOS circuits

International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Volumn , Issue , 1999, Pages 278-281

  Pelella, M M ^a   Chuang, C T ^a   Tretz, C ^a   Curran, B W ^a   Rosenfield, M G ^a  

^a UNIVERSITY OF FLORIDA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC INVERTERS; ELECTRIC WAVEFORMS; ELECTRONIC PROPERTIES; GATES (TRANSISTOR); HYSTERESIS; INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY;

CIRCUIT SIZING; FLOATING BODY; GATE PROPAGATION DELAY;

CMOS INTEGRATED CIRCUITS;

EID: 0032599138     PISSN: 1524766X     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (7)