Fabrication of a double-side IGBT by very low temperature wafer bonding

IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)

Volumn , Issue , 1999, Pages 45-48

  Hobart, K D ^a   Kub, F J ^a   Dolny, G ^a   Zafrani, M ^a   Neilson, J M ^a   Gladish, J ^a   McLachlan, C ^a  

^a NAVAL RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; BONDING; ELECTRIC LOSSES; ELECTRIC RESISTANCE; ELECTRON ENERGY LEVELS; FABRICATION; GATES (TRANSISTOR); MOSFET DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE; SILICON WAFERS; SWITCHING; THERMAL EFFECTS;

BOND INTERFACE; HOLE INJECTION; INSULATED GATE BIPOLAR TRANSISTORS; SWITCHING LOSS; WAFER BONDING;

BIPOLAR TRANSISTORS;

EID: 0032598951     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (10)