Device and circuit design issues in SOI technology

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1999, Pages 339-346

  Shahidi, Ghavam G ^a   Ajmera, Atul ^a   Assaderaghi, Fariborz ^a   Bolam, Ronald J ^a   Hovel, Harold ^a   Leobandung, Effendi ^a   Rausch, Werner ^a   Sadana, Devendra ^a   Schepis, Dominic ^a   Wagner, Lawrence F ^a   Wissel, Larry ^a   Wu, Kun ^a   Davari, Bijan ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; LITHOGRAPHY; SEMICONDUCTOR DEVICES;

PARTIALLY DEPLETED DEEP SUBMICRON CMOS; PARTIALLY DEPLETED SILICON ON INSULATOR DEVICE;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0032597805     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (10)