Giga bit per second per pin differential CMOS circuits for pseudo ECL signaling

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1999, Pages 601-604

  Djahanshahi, Hormoz ^a   Hansen, Flemming ^a   Salama, C Andre T ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DATA COMMUNICATION SYSTEMS; ELECTRIC POTENTIAL; FLIP FLOP CIRCUITS; SCHEMATIC DIAGRAMS; SIGNAL RECEIVERS; STANDARDS; TRANSISTORS; TRANSMITTERS;

GIGA BIT PER SECOND PER PIN DIFFERENTIAL CMOS CIRCUITS; INPUT AND OUTPUT INTERFACES;

CMOS INTEGRATED CIRCUITS;

EID: 0032597717     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (4)