Efficient network-flow based techniques for dynamic fault reconfiguration in FPGAs

Proceedings - Annual International Conference on Fault-Tolerant Computing

Volumn , Issue , 1999, Pages 122-129

  Mahapatra, Nihar R ^a   Dutt, Shantanu ^a  

^a UNIVERSITY AT BUFFALO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FIELD PROGRAMMABLE GATE ARRAYS; INTEGRATED CIRCUIT LAYOUT; LOGIC DESIGN; RANDOM ACCESS STORAGE;

FAULT RECONFIGURATION; RECTILINEAR RECONFIGURATION PATHS;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0032597687     PISSN: 07313071     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (14)