A single chip multiprocessor integrated with high density DRAM

IEICE Transactions on Electronics

Volumn E82-C, Issue 8, 1999, Pages 1567-1577

  Yamauchi, Tadaaki ^a,b   Hammond, Lance ^a,b   Olukotun, Oyekunle A ^a,b   Arimoto, Kazutami ^a,b  

^a MITSUBISHI ELECTRIC CORPORATION   (Japan)

^b Stanford University   (United States)

Author keywords

DRAM; Embedded DRAM; Multiprocessor on achip; Multiprocessors; Oh chip DRAM; On chip L2 caches; SRAM caches

Indexed keywords

BUFFER STORAGE; DYNAMIC RANDOM ACCESS STORAGE;

SINGLE CHIP MULTIPROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0032596125     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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