On synchronizing sequences and test sequence partitioning

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1998, Pages 158-167

  Pomeranz, I ^a   Reddy, S M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; PARAMETER ESTIMATION; SYNCHRONIZATION;

SEQUENTIAL CIRCUITS;

EID: 0032320940     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (23)