Nonenumerative ATPG for functionally sensitizable path delay faults

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 1998, Pages 440-445

  Karayiannis, D ^a   Tragoudas, S ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TESTING; DELAY CIRCUITS; DESIGN FOR TESTABILITY; ELECTRIC FAULT LOCATION; POLYNOMIALS;

TEST PATTERN GENERATION;

INTEGRATED CIRCUIT TESTING;

EID: 0032319936     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (24)