Non-enumerative path delay fault simulator for sequential circuits

IEEE International Test Conference (TC)

Volumn , Issue , 1998, Pages 934-943

  Parodi, Carlos G ^a   Agrawal, Vishwani D ^a   Bushnell, Michael L ^a   Wu, Shianling ^a  

^a RUTGERS UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; FORMAL LOGIC; GRAPH THEORY;

NON-ENUMERATIVE PATH DELAY FAULT SIMULATORS; PATH STATUS GRAPH (PSG) METHODS;

SEQUENTIAL CIRCUITS;

EID: 0032314560     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)