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Volumn , Issue , 1998, Pages 500-506
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Scalable architecture for VLSI test
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRONICS PACKAGING;
VLSI CIRCUITS;
EMBEDDED CORE COMPONENTS;
INTEGRATED CIRCUIT TESTING;
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EID: 0032313708
PISSN: 10893539
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (0)
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