2.5-Gbit/s SDH/SONET terminating circuit that uses low-power bipolar LSI technologies and multi-chip module technology

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 1998, Pages 144-147

  Kawai, K ^a   Koike, K ^a   Koga, M ^a   Takei, Y ^a   Ichino, H ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MULTICHIP MODULES;

OPTICAL LINE TERMINATORS (OLT);

LSI CIRCUITS;

EID: 0032312331     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)