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Volumn 3, Issue , 1998, Pages 708-712
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VLSI circuit complexity and decoding performance analysis for low-power RSC turbo-code and iterative block decoders design
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
APPROXIMATION THEORY;
BLOCK CODES;
CMOS INTEGRATED CIRCUITS;
DECODING;
LOGIC CIRCUITS;
ITERATIVE BLOCK DECODERS;
TURBO CODES;
VLSI CIRCUITS;
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EID: 0032310162
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (8)
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References (6)
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