Bipolar model extension for MOS transistors considering gate coupling effects in the HBM ESD domain

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 1998, Pages 271-280

  Wolf, Heinrich ^a   Gieser, Horst ^a   Stadler, Wolfgang ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC DISCHARGES; ELECTROSTATICS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION;

GATE COUPLING EFFECTS;

MOSFET DEVICES;

EID: 0032309320     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (20)