Dynamic avalanching considerations in optimization of reverse conducting diode in IGBT modules

Proceedings of the IEEE Bipolar/BiCMOS Circuits and Technology Meeting

Volumn , Issue , 1998, Pages 195-198

  Mulay, A ^a   Trivedi, M ^a   Shenai, K ^a  

^a UNIVERSITY OF ILLINOIS AT CHICAGO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AVALANCHE DIODES; COMPUTER SIMULATION; ELECTRIC FIELD EFFECTS; ELECTRIC POTENTIAL; ENERGY DISSIPATION; GATES (TRANSISTOR); OPTIMIZATION; POWER CONTROL;

INSULATED GATE BIPOLAR TRANSISTORS (IGBT);

BIPOLAR TRANSISTORS;

EID: 0032306521     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)