Integrated partitioning and scheduling for hardware/software co-design

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 609-614

  Liu, H ^a   Wong, D F ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SOFTWARE; CONSTRAINT THEORY; FIELD PROGRAMMABLE GATE ARRAYS; PROGRAM PROCESSORS; REAL TIME SYSTEMS; SCHEDULING;

CENTRAL PROCESSING UNIT; PARTITIONING;

COMPUTER ARCHITECTURE;

EID: 0032303533     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.1998.727125     Document Type: Conference Paper

References (17)