Area minimization of redundant CORDIC pipeline architectures

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 136-141

  Wassatsch, Andreas ^a   Dolling, Steffen ^a   Timmermann, Dirk ^a  

^a UNIVERSITY OF ROSTOCK   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CALCULATIONS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; REDUNDANCY;

AREA MINIMIZATION; PIPELINE ARCHITECTURE;

PIPELINE PROCESSING SYSTEMS;

EID: 0032298683     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)