690ps read-access latency register file for a GHz integer microprocessor

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 6-10

  Takahashi, O ^a   Silberman, J ^a   Dhong, S ^a   Hofstee, P ^a   Aoki, N ^a  

^a IBM AUSTIN RESEARCH LABORATORY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; DATA FLOW ANALYSIS; ELECTRIC POTENTIAL; PERSONAL COMPUTERS; SHIFT REGISTERS; TRANSISTORS;

BIT LINE COMPLEMENT; BIT LINE TRUE; GIGAHERTZ UNIT TEST SITE; INTEGER MICROPROCESSOR; REGISTER FILE;

MICROPROCESSOR CHIPS;

EID: 0032295844     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)