System-level performance estimation strategy for sw and hw

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 48-53

  Allara, A ^a   Brandolese, C ^a   Fornaciari, W ^a   Salice, F ^a   Sciuto, D ^a  

^a Italtel SpA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SIMULATION; COMPUTER SOFTWARE; FINITE AUTOMATA; PROGRAM DEBUGGING; REENGINEERING; UNIX;

CODESIGN FINITE STATE MACHINES; HIGH LEVEL COSIMULATION; SYSTEM LEVEL PERFORMANCE ESTIMATION;

EMBEDDED SYSTEMS;

EID: 0032295070     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)