Circuit implementation of a 600MHz superscalar RISC microprocessor

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1998, Pages 104-110

  Matson, M ^a   Bailey, D ^a   Bell, S ^a   Biro, L ^a   Butler, S ^a   Clouser, J ^a   Farrell, J ^a   Gowan, M ^a   Priore, D ^a   Wilcox, K ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BUFFER STORAGE; CMOS INTEGRATED CIRCUITS; CRITICAL PATH ANALYSIS; INTEGRATED CIRCUIT LAYOUT; REDUCED INSTRUCTION SET COMPUTING;

CIRCUIT IMPLEMENTATION; POWER CONSUMPTION;

MICROPROCESSOR CHIPS;

EID: 0032290916     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)