Some thoughts on the word error rate measurement of A/D converters

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 1998, Pages 453-456

  Chiorboli, Giovanni ^a   De Salvo, Barbara ^a   Franco, Giovanni ^a   Morandi, Carlo ^a  

^a UNIVERSITY OF PARMA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

WORD ERROR RATE (WER); A/D CONVERTER; ERROR LEVELS; EXPECTED ERROR RATES; INTRINSIC NOISE; METASTABILITIES; POST PROCESSING; TEST BENCHES; WORD ERROR RATE;

CODES (SYMBOLS); ERROR ANALYSIS; MEASUREMENT ERRORS; PROBABILITY; ERRORS; SPEECH RECOGNITION;

ANALOG TO DIGITAL CONVERSION;

EID: 0032285864     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (8)

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3. C. W. Mangelsdorf, "A 400-MHz input flash converter with error correction," IEEE J. of Solid-State Circuits, vol. 25, pp. 184-191, February 1990.
4. C. L. Portmann and T. H. Y. Meng, "Power-efficient metastability error reduction in CMOS flash A/D converters," IEEE J. of Solid-State Circuits, vol. 31, pp. 11321140, August 1996.
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6. IEEE Std. 1057-94, IEEE Standard for Digitizing Waveform Recorders, The Institute of Electrical and Electronics Engineers Inc., New York, December 1994.
7. "High speed ADC bit error rate measurement," Plessey Application Note AN65, pp.4.54-4.58.
8. M. Mahoney, DSP-based testing of analog and mixed-signal circuits, IEEE Computer Society Press, Washington, D.C., 1987, Chapter 4, pp.45-58.