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Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 1, Issue , 1998, Pages 23-26

A current steering architecture for 12-bit high-speed D/A converters

(5) Marques, A a Bastos, J a Steyaert, M a Sansen, W a Leuven, K U a

a ESAT (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRONICS INDUSTRY; DIGITAL TO ANALOG CONVERSION; INTEGRATED CIRCUIT LAYOUT; SWITCHING CIRCUITS;

CURRENT STEERING ARCHITECTURE; D/A CONVERTERS; DYNAMIC CHARACTERISTICS; HIGH SPEED; SWITCHING SCHEME;

DIGITAL TO ANALOG CONVERSION; CMOS INTEGRATED CIRCUITS;

CURRENT STEERING;

EID: 0032281890 PISSN: None EISSN: None Source Type: Conference Proceeding
DOI: 10.1109/ICECS.1998.813257 Document Type: Conference Paper

Times cited : (8)

References (8)

1
- 0031193193
- Specifying communications DACs
- July
- P. Hendriks, "Specifying Communications DACs", IEEE Spectrum, pp. 58-69, July 1997.
- (1997) IEEE Spectrum , pp. 58-69
- Hendriks, P.¹

2
- 0022862503
- An 80-MHz 8-bit CMOS D/A converter
- Dec.
- T. Miki, Y. Nakamura, M. Nakaya, S. Asai, Y. Akasaka, and Y. Horiba, "An 80-MHz 8-bit CMOS D/A Converter", IEEE J. Solid-State Circuits, Vol. SC-21, No. 6, pp. 983-988, Dec. 1986.
- (1986) IEEE J. Solid-state Circuits , vol.SC-21 , Issue.6 , pp. 983-988
- Miki, T.¹ Nakamura, Y.² Nakaya, M.³ Asai, S.⁴ Akasaka, Y.⁵ Horiba, Y.⁶

3
- 0026140313
- A 10-b 70-MS/s CMOS D/A converter
- Apr.
- Y. Nakamura, T. Miki, A. Maeda, H. Kondoh, and N. Yazawa, "A 10-b 70-MS/s CMOS D/A Converter", IEEE J. Solid-State Circuits, Vol. 26, No. 4, pp. 637-642, Apr. 1991.
- (1991) IEEE J. Solid-state Circuits , vol.26 , Issue.4 , pp. 637-642
- Nakamura, Y.¹ Miki, T.² Maeda, A.³ Kondoh, H.⁴ Yazawa, N.⁵

4
- 0029229894
- A low glitch 10-bit 75-MHz CMOS Video D/A converter
- Jan.
- T. Wu, C. Jih, J. Chen, and C. Wu, "A Low Glitch 10-bit 75-MHz CMOS Video D/A Converter", IEEE Journal of Solid-State Circuits, Vol. 30, No. 1, pp. 68-72, Jan. 1995.
- (1995) IEEE Journal of Solid-state Circuits , vol.30 , Issue.1 , pp. 68-72
- Wu, T.¹ Jih, C.² Chen, J.³ Wu, C.⁴

5
- 0024754187
- Matching properties of MOS transistors
- Oct.
- M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, "Matching Properties of MOS Transistors", IEEE Journal of Solid-State Circuits, Vol. SC-24, pp. 1433-1439, Oct. 1989.
- (1989) IEEE Journal of Solid-state Circuits , vol.SC-24 , pp. 1433-1439
- Pelgrom, M.J.M.¹ Duinmaijer, A.C.J.² Welbers, A.P.G.³

6
- 84940516156
- A 12b accuracy 300MS/S update rate CMOS DAC
- accepted for publication in
- A. Marques, J. Bastos, A. Van den Bosch, J. Vandenbussche, M. Steyaert, and W. Sansen, "A 12b Accuracy 300MS/S Update Rate CMOS DAC", accepted for publication in ISSCC98.
- ISSCC98
- Marques, A.¹ Bastos, J.² Van Den Bosch, A.³ Vandenbussche, J.⁴ Steyaert, M.⁵ Sansen, W.⁶

7
- 0029713096
- A high-yield 12-bit 250 MS/s CMOS D/A converter
- May
- J. Bastos, M. Steyaert, and W. Sansen, "A High-Yield 12-bit 250 MS/s CMOS D/A Converter", in proc. IEEE 1996 CICC, pp. 431-434, May 1996.
- (1996) Proc. IEEE 1996 CICC , pp. 431-434
- Bastos, J.¹ Steyaert, M.² Sansen, W.³

8
- 84940556674
- A sub-pVs 8-bit 500 MS/s update rate CMOS DAC
- submitted for publication in
- A. Marques, J. Bastos, M. Steyaert, and W. Sansen, "A sub-pVs 8-bit 500 MS/s Update Rate CMOS DAC", submitted for publication in VLSI'98.
- VLSI'98
- Marques, A.¹ Bastos, J.² Steyaert, M.³ Sansen, W.⁴

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.