Disassembly Petri net generation in the presence of XOR precedence relationships

Proceedings of the IEEE International Conference on Systems, Man and Cybernetics

Volumn 1, Issue , 1998, Pages 13-18

  Moore, K E ^a   Gungor, A ^a   Gupta, S M ^a  

^a BAE SYSTEMS   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; AUTOMATION; LOGIC GATES; MATRIX ALGEBRA; PETRI NETS; PROCESS ENGINEERING;

DISASSEMBLY PROCESS PLAN; REACHABILITY TREE METHOD;

LOGIC DESIGN;

EID: 0032267397     PISSN: 08843627     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)