Analysis of the trade-off between bandwidth, resolution, and power in ΔΣ analog to digital converters

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 1998, Pages 153-156

  Marques, A ^a   Peluso, V ^a   Steyaert, M ^a   Sansen, W ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ECONOMIC AND SOCIAL EFFECTS; PRODUCT DESIGN; DELTA SIGMA MODULATION; ELECTRIC NETWORK SYNTHESIS;

ANALOG TO DIGITAL CONVERTERS; CMOS TECHNOLOGY; CURRENT TECHNOLOGY; DELTA-SIGMA; DELTA-SIGMA CONVERTERS; TRADE OFF; TRADE-OFF RELATIONSHIP;

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS;

DELTA SIGMA ANALOG TO DIGITAL CONVERTERS;

EID: 0032264807     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.1998.814853     Document Type: Conference Paper

References (5)

1. E. Vittoz, "Future of analog in the VLSI environment", in Proc. ISCAS'90, pp. 1372-1375, May 1990.
2. R. Castello, P. Gray, "Performance Limitations in Switched-Capacitor Filters", IEEE Trans. Circuits and Systems, vol. CAS-32, no. 9, pp. 865-876, Sep. 1985.
3. P. Kinget, M. Steyaert, "Impact of transistor mismatch on the speed-accuracy-power trade-off of analog CMOS circuits", Proc. IEEE C1CC96, pp. 333-336, May 1996.
4. P. Kinget, M. Steyaert, "Analog VLSI integration of massive parallel signal processing systems", Kluwer Academic Publishers, 1996
5. A. Marques, V. Peluso, M. Steyaert, W. Sansen, "A 15-bit 2 MHz Nyquist Rate ΔΣ ADC in a 1 μm CMOS Technology", Proc. ESSCIRC'97, pp. 68-71, Sep. 1997.