Functional high-speed characterization and modeling of a six-layer copper wiring structure and performance comparison with aluminum on-chip interconnections

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1998, Pages 295-298

  Deutsch, A ^a   Harrer, H ^a   Surovic, C W ^a   Hellner, G ^a   Edelstein, D C ^a   Goldblatt, R D ^a   Biery, G A ^a   Greco, N A ^a   Foster, D M ^a   Crabbe, E ^a   Su, L T ^a   Coteus, P W ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; COMPUTER SIMULATION; COPPER; CROSSTALK; ELECTROMAGNETIC WAVE PROPAGATION; MATRIX ALGEBRA; MULTILAYERS; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE TESTING; SILICA;

COPPER WIRING;

CMOS INTEGRATED CIRCUITS;

EID: 0032256938     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)