Origin of secondary electron gate current: A multiple-stage Monte Carlo study for scaled, low-power flash memory

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 1998, Pages 889-892

  Kencke, D L ^a   Wang, X ^a   Wang, H ^a   Ouyang, Q ^a   Jallepalli, S ^a   Rashed, M ^a   Maziar, C ^a   Tasch Jr , A ^a   Banerjee, S K ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; GATES (TRANSISTOR); MONTE CARLO METHODS; NONVOLATILE STORAGE; SEMICONDUCTOR DOPING; SUBSTRATES;

ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY (EEPROM); FLASH MEMORY;

PROM;

EID: 0032255803     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)