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Volumn 2, Issue , 1998, Pages 1017-1022
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Validation and verification of the simulation model of a photolithography process in semiconductor manufacturing
a
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Author keywords
[No Author keywords available]
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Indexed keywords
CLEAN ROOMS;
PHOTOLITHOGRAPHY;
PROCESS ENGINEERING;
PRODUCTION ENGINEERING;
SEMICONDUCTOR DEVICE MANUFACTURE;
MANUFACTURING SIMULATION MODEL;
COMPUTER SIMULATION;
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EID: 0032255085
PISSN: 02750708
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (22)
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References (16)
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