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Volumn 8, Issue 8, 1998, Pages 941-946

Two-dimensional rank-order filter by using max-min sorting network

Author keywords

Block processing; Max min sorting network; Rank order filter

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; IMAGE ENHANCEMENT; TWO DIMENSIONAL; VLSI CIRCUITS;

EID: 0032254984     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/76.736722     Document Type: Article
Times cited : (12)

References (11)
  • 2
    • 0028710965 scopus 로고
    • Novel sorting network-based architectures for rank order filters
    • Dec.
    • C. Chakrabarti and L. Y. Wang, "Novel sorting network-based architectures for rank order filters," IEEE Trans. VLSI Syst., vol. 2, pp. 502-507, Dec. 1994.
    • (1994) IEEE Trans. VLSI Syst. , vol.2 , pp. 502-507
    • Chakrabarti, C.1    Wang, L.Y.2
  • 3
    • 84939764389 scopus 로고
    • Bit-serial realizations of a class of nonlinear filters based on positive Boolean functions
    • June
    • K. Chen, "Bit-serial realizations of a class of nonlinear filters based on positive Boolean functions," IEEE Trans. Circuits Syst., pp. 785-794, June 1989.
    • (1989) IEEE Trans. Circuits Syst. , pp. 785-794
    • Chen, K.1
  • 4
    • 0028407913 scopus 로고
    • A new VLSI architecture suitable for multidimensional order statistic filtering
    • Apr.
    • M. R. Hakami, P. J. Warter, and C. G. Boncelet, Jr., "A new VLSI architecture suitable for multidimensional order statistic filtering," IEEE Trans. Signal Processing, vol. 42, pp. 991-993, Apr. 1994.
    • (1994) IEEE Trans. Signal Processing , vol.42 , pp. 991-993
    • Hakami, M.R.1    Warter, P.J.2    Boncelet Jr., C.G.3
  • 6
    • 0028733710 scopus 로고
    • High-speed median filter design using shiftable content-addressable memory
    • Dec.
    • C. Y. Lee, P. W. Hsieh, and J. M. Tsai, "High-speed median filter design using shiftable content-addressable memory," IEEE Trans. Circuits Syst. Video Technol., vol. 4, pp. 544-549, Dec. 1994.
    • (1994) IEEE Trans. Circuits Syst. Video Technol. , vol.4 , pp. 544-549
    • Lee, C.Y.1    Hsieh, P.W.2    Tsai, J.M.3
  • 7
    • 0030146537 scopus 로고    scopus 로고
    • A note on 'On the VLSI implementation of real-time order statistic filter,'
    • May
    • C. C. Lin and C. J. Kuo, "A note on 'On the VLSI implementation of real-time order statistic filter,'" IEEE Trans. Signal Processing, vol. 44, pp. 1314-1315, May 1996.
    • (1996) IEEE Trans. Signal Processing , vol.44 , pp. 1314-1315
    • Lin, C.C.1    Kuo, C.J.2
  • 8
    • 0346602470 scopus 로고
    • A modulo merge sorting network
    • K. J. Liszka and K. E. Batcher, "A modulo merge sorting network," Proc. IEEE, pp. 164-169, 1992.
    • (1992) Proc. IEEE , pp. 164-169
    • Liszka, K.J.1    Batcher, K.E.2
  • 9
    • 0028426113 scopus 로고
    • Parallel processing architectures for rank order and stack filters
    • May
    • L. E. Lucke and K. K. Parhi, "Parallel processing architectures for rank order and stack filters," IEEE Trans. Signal Processing, vol. 42, pp. 1178-1189, May 1994.
    • (1994) IEEE Trans. Signal Processing , vol.42 , pp. 1178-1189
    • Lucke, L.E.1    Parhi, K.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.