Heuristic algorithm to design AND-OR-EXOR three-level networks

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 1998, Pages 69-74

  Debnath, Debatosh ^a   Sasao, Tsutomu ^a  

^a KYUSHU INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; HEURISTIC METHODS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL PROGRAMMING;

DIVIDE-AND-CONQUER STRATEGY; SHANNON DECOMPOSITIONS; SUM-OF-PRODUCTS EXPRESSIONS (EX-SOP);

LOGIC CIRCUITS;

EID: 0032218706     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (32)