Logical-physical co-design for deep submicron circuits: Challenges and solutions

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 1998, Pages 137-142

  Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; OPTIMIZATION; PROBLEM SOLVING;

DEEP SUBMICRON CIRCUITS; LOGICAL-PHYSICAL CO-DESIGN METHODS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0032218690     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (23)