Air-pressure-model-based fast algorithms for general floorplan

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 1998, Pages 563-570

  Izumi, Tomonori ^a   Takahashi, Atsushi ^a   Kajitani, Yoji ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC NETWORK TOPOLOGY; MATHEMATICAL MODELS; OPTIMIZATION; VLSI CIRCUITS;

FLOORPLAN TOPOLOGY; TOPOLOGICAL CONSTRAINTS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0032218617     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (19)