Analytical model for the threshold voltage of Accumulation Channel MOS-Gate devices

Solid-State Electronics

Volumn 42, Issue 11, 1998, Pages 1975-1979

  Thapar, Naresh ^a   Baliga, B Jayant ^a  

^a NORTH CAROLINA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; COMPUTER SIMULATION; GATES (TRANSISTOR); SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SILICON CARBIDE; THRESHOLD VOLTAGE;

ACCUMULATION CHANNEL METAL OXIDE SEMICONDUCTOR (MOS)-GATE DEVICES;

MOS DEVICES;

EID: 0032208760     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(98)00179-8     Document Type: Article

References (8)

1. Thapar, N. and Baliga, B. J., IEEE Electron Device Lett., 1997, 18(5), 178.
2. Bhatnagar, M. and Baliga, B. J., IEEE Trans. Electron. Dev., 1993, 40(3), 645.
3. Shenoy, P. M. and Baliga, B. J., 9th SiC and Related Materials Conference, 1997, p. 158.
4. Thapar, N. and Baliga, B. J., PSRC Technical Report TR-98-01, No. 1, 1998.
5. Grove, A. S., Physics and Technology of Semiconductor Devices. Wiley, New York, 1967, p. 279.
6. Schroder, D. K., Semiconductor Material and Device Characterization. Wiley, New York, 1990, p. 183.
7. Nicollian, E. H. and Brews, J. R., MOS (Metal Oxide Semiconductor) Physics and Technology. Wiley, New York, 1982, p. 423.
8. Tsividis, Y. P., Operation and Modelling of the MOS Transistors. McGraw-Hill, 1987, p. 168.