Low-power multirate architecture for if digital frequency down converter

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 11, 1998, Pages 1487-1494

  Jou, Shyh Jye ^a   Wu, Shou Yang ^a   Wang, Chorng Kuang ^a  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

Frequency down converter; Low power; Multirate architecture

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; ELECTRIC NETWORK SYNTHESIS; FIR FILTERS;

FREQUENCY DOWN CONVERTERS;

FREQUENCY CONVERTERS;

EID: 0032203717     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.735360     Document Type: Article

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