메뉴 건너뛰기




Volumn 21, Issue 4, 1998, Pages 360-370

Economics modeling of multichip modules testing strategies

Author keywords

Cost models; Multichip modules (MCM); Multichip systems; Test economics; Test strategies; Tradeoff analysis

Indexed keywords

BUILT-IN SELF TEST; COST EFFECTIVENESS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; MULTICHIP MODULES;

EID: 0032202462     PISSN: 10709894     EISSN: None     Source Type: Journal    
DOI: 10.1109/96.730420     Document Type: Article
Times cited : (3)

References (14)
  • 2
    • 0019659681 scopus 로고
    • Defect level as a function of fault coverage
    • Dec.
    • T. W. Williams and N. C. Brown, "Defect level as a function of fault coverage," IEEE Trans. Comput., vol. C030, pp. 987-988, Dec. 1981.
    • (1981) IEEE Trans. Comput. , vol.C030 , pp. 987-988
    • Williams, T.W.1    Brown, N.C.2
  • 3
    • 0020087448 scopus 로고
    • Fault coverage requirements in production of testing of LSI circuits
    • Feb.
    • V. Agrawal, S. Seth, and P. Agrawal, "Fault coverage requirements in production of testing of LSI circuits," IEEE J. Solid-State Circuits, pp. 57-61, Feb. 1982.
    • (1982) IEEE J. Solid-State Circuits , pp. 57-61
    • Agrawal, V.1    Seth, S.2    Agrawal, P.3
  • 7
    • 85034193455 scopus 로고
    • Economics of design and test for electronic circuits and systems
    • A. P. Ambler, M. Abadir, and S. Sastry, Eds., Austin, TX, Sept.
    • A. P. Ambler, M. Abadir, and S. Sastry, Eds., "Economics of design and test for electronic circuits and systems," in Proc. 1st Int. Workshop Econom. Design Test, Austin, TX, Sept. 1991.
    • (1991) Proc. 1st Int. Workshop Econom. Design Test
  • 8
    • 0020501173 scopus 로고
    • Quality level and fault coverage for multichip modules
    • K. Torku and C. Radke, "Quality level and fault coverage for multichip modules," in Proc. 20th Design Automat. Conf., 1983, pp. 201-206.
    • (1983) Proc. 20th Design Automat. Conf. , pp. 201-206
    • Torku, K.1    Radke, C.2
  • 9
    • 0026168974 scopus 로고
    • Testing and diagnosis of multichip modules
    • June
    • D. Karpenske and C. Talbot, "Testing and diagnosis of multichip modules," J. Solid State Technol., June 1991, pp. 24-26.
    • (1991) J. Solid State Technol. , pp. 24-26
    • Karpenske, D.1    Talbot, C.2
  • 10
    • 0025556199 scopus 로고
    • Bare chip test techniques for multichip technologies
    • May
    • R. Fillion, R. Wojnaiowski, and W. Daum, "Bare chip test techniques for multichip technologies," in Proc. ECTC Conf., May 1990, p. 554.
    • (1990) Proc. ECTC Conf. , pp. 554
    • Fillion, R.1    Wojnaiowski, R.2    Daum, W.3
  • 11
    • 0026618710 scopus 로고
    • High density CMOS multichip module testing and diagnosis
    • R. Bassett, P. Gillis, and J. Shushereba, "High density CMOS multichip module testing and diagnosis," in Proc. Int. Test Conf., 1991, pp. 530-539.
    • (1991) Proc. Int. Test Conf. , pp. 530-539
    • Bassett, R.1    Gillis, P.2    Shushereba, J.3
  • 12
    • 2342467852 scopus 로고
    • The MCM dilemma
    • Z. Sekulic, "The MCM dilemma," Adv. Packag. J., pp. 42-45, 1992.
    • (1992) Adv. Packag. J. , pp. 42-45
    • Sekulic, Z.1
  • 13
    • 0026960630 scopus 로고
    • High yield assembly of multichip modules through known good IC's and effective test strategies
    • Dec.
    • J. Hagge and R. Wagner, "High yield assembly of multichip modules through known good IC's and effective test strategies," Proc. IEEE, vol. 80, pp. 1965-1994, Dec. 1992.
    • (1992) Proc. IEEE , vol.80 , pp. 1965-1994
    • Hagge, J.1    Wagner, R.2
  • 14
    • 33749277257 scopus 로고
    • SPARC paces move to multichip modules
    • Mar. 4
    • L. Wirebel and J. Thompson "SPARC paces move to multichip modules," Electron. Eng. Times, p. 16, Mar. 4, 1991.
    • (1991) Electron. Eng. Times , pp. 16
    • Wirebel, L.1    Thompson, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.