Circuit optimization using carry-save-adder cells

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 10, 1998, Pages 974-984

  Kim, Taewhan ^a,b   Jao, William ^a,c   Tjiang, Steve ^b,c  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^b Aimfast Corp   (United States)

^c SYNOPSYS INC   (United States)

Author keywords

Arithmetic optimization; Cell allocation; High level synthesis

Indexed keywords

ALGORITHMS; LOGIC DESIGN; OPTIMIZATION;

CARRY-SAVE-ADDER (CSA) CELLS;

ADDERS;

EID: 0032183552     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.728918     Document Type: Article

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