Highly Reliable Raised Source/Drain Formation Process by Selective Si Deposition for 50 nm Junction-Depth MOSFET

NEC Research and Development

Volumn 39, Issue 4, 1998, Pages 503-507

  Matsuda, Tomoko ^a,b,c,d   Shishiguchi, Seiichi ^a,b,c,d,e   Saito, Shuichi ^a,b,c  

^a ULSI Device Development Laboratories   (Japan)

^b TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

^c NEC CORPORATION   (Japan)

^d JAPAN SOCIETY OF APPLIED PHYSICS   (Japan)

^e National Laboratory for High Energy Physics   (Japan)

Author keywords

Raised S D (Source Drain) structure; Shallow junction; UHV CVD (Ultra High Vacuum Chemical Vapor Deposition)

Indexed keywords

CHEMICAL DRY ETCHING (CDE); ULTRAHIGH VACUUM CHEMICAL VAPOR DEPOSITION;

ANNEALING; CHEMICAL VAPOR DEPOSITION; DRY ETCHING; ION IMPLANTATION; LEAKAGE CURRENTS; MORPHOLOGY; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; VACUUM APPLICATIONS;

MOSFET DEVICES;

EID: 0032183396     PISSN: 0547051X     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

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