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Volumn 15, Issue 4, 1998, Pages 36-41

Synthesizing fast, online-testable control units

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; COST EFFECTIVENESS; ERROR CORRECTION; ERROR DETECTION; FINITE AUTOMATA; ONLINE SYSTEMS; SEQUENTIAL MACHINES;

EID: 0032181620     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.735925     Document Type: Review
Times cited : (8)

References (10)
  • 1
    • 0026131335 scopus 로고
    • Optimum and Heuristic Algorithms for an Approach to Finite-State Machine Decomposition
    • Mar.
    • P. Ashar, S. Devadas, and A.R. Newton, "Optimum and Heuristic Algorithms for an Approach to Finite-State Machine Decomposition, "IEEETrans. Computer-AidedDesign, Vol. 10, No. 3, Mar. 1991, pp. 296-310.
    • (1991) IEEETrans. Computer-AidedDesign , vol.10 , Issue.3 , pp. 296-310
    • Ashar, P.1    Devadas, S.2    Newton, A.R.3
  • 2
    • 0028722357 scopus 로고
    • An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures
    • IEEE Computer Society Press, Los Alamitos, Calif.
    • S. Hellebrand and H.-J. Wunderlich, "An Efficient Procedure for the Synthesis of Fast Self-Testable Controller Structures," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, IEEE Computer Society Press, Los Alamitos, Calif., 1994, pp. 110-116.
    • (1994) Proc. IEEE/ACM Int'l Conf. Computer-Aided Design , pp. 110-116
    • Hellebrand, S.1    Wunderlich, H.-J.2
  • 6
    • 84944483542 scopus 로고
    • A General Method of Applying Error Correction to Synchronous Digital Systems
    • Mar.
    • D.B. Armstrong, "A General Method of Applying Error Correction to Synchronous Digital Systems," Bell Systems Tech. J., Vol. 40, No. 2, Mar. 1961, pp. 577-593.
    • (1961) Bell Systems Tech. J. , vol.40 , Issue.2 , pp. 577-593
    • Armstrong, D.B.1
  • 7
    • 0025414885 scopus 로고
    • Optimized Synthesis of Concurrently Checked Controllers
    • Apr.
    • R. Leveugle and G. Saucier, "Optimized Synthesis of Concurrently Checked Controllers," IEEE Trans. Computers, Vol. 39, No. 4, Apr. 1990, pp. 419-425.
    • (1990) IEEE Trans. Computers , vol.39 , Issue.4 , pp. 419-425
    • Leveugle, R.1    Saucier, G.2
  • 10
    • 0025489532 scopus 로고
    • NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations
    • Sept.
    • T. Villa and A. Sangiovanni-Vincentelli, "NOVA: State Assignment of Finite State Machines for Optimal Two-Level Logic Implementations," IEEE Trans. Computer-Aided Design, Vol. 9, No. 9, Sept. 1990, pp. 905-924.
    • (1990) IEEE Trans. Computer-Aided Design , vol.9 , Issue.9 , pp. 905-924
    • Villa, T.1    Sangiovanni-Vincentelli, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.