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Volumn 17, Issue 1-2, 1998, Pages 67-89

DPAD2 - A Field Programmable Analog Array

Author keywords

Analog field array; CMOS

Indexed keywords

CAPACITORS; DESIGN; PERFORMANCE; SIGNAL PROCESSING; SWITCHES;

EID: 0032156840     PISSN: 09251030     EISSN: None     Source Type: Journal    
DOI: 10.1007/978-1-4757-5224-3_4     Document Type: Article
Times cited : (20)

References (21)
  • 1
    • 84889229851 scopus 로고    scopus 로고
    • IMP, Inc. Home Pages, http://www.impweb.com/.
  • 2
    • 0029205293 scopus 로고    scopus 로고
    • A Field Programmable Mixed-Analog-Digital Array
    • P. Chow, P. Chowm and P. Glenn Gulak, "A Field Programmable Mixed-Analog-Digital Array." FPGA'95, pp. 104-109.
    • FPGA'95 , pp. 104-109
    • Chow, P.1    Chowm, P.2    Gulak, P.G.3
  • 3
    • 2342504469 scopus 로고    scopus 로고
    • A computational approach to VLSI analog design
    • Oxford Centre for Innovation, Oxford, UK, 20th November
    • D. Bradbury et al., "A computational approach to VLSI analog design." in Analogue Signal Processing, Oxford Centre for Innovation, Oxford, UK, 20th November 1996.
    • (1996) Analogue Signal Processing
    • Bradbury, D.1
  • 4
    • 84889217514 scopus 로고    scopus 로고
    • FIPSOC: A New Concept to Mixed Signal Integration
    • National Exhibition Centre, Birmingham, UK, October
    • J. Faura et al., "FIPSOC: A New Concept to Mixed Signal Integration." in The Silicon Design Show, National Exhibition Centre, Birmingham, UK, October 1996, pp. 47-51.
    • (1996) The Silicon Design Show , pp. 47-51
    • Faura, J.1
  • 7
    • 0020919278 scopus 로고
    • Fully integrated active RC filters in MOS technology
    • December
    • M. Banu and Y. Tsividis, "Fully integrated active RC filters in MOS technology." IEEE Journal of Solid-State Circuits 18(6), pp. 644-651, December 1983.
    • (1983) IEEE Journal of Solid-State Circuits , vol.18 , Issue.6 , pp. 644-651
    • Banu, M.1    Tsividis, Y.2
  • 11
    • 84889173616 scopus 로고    scopus 로고
    • Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA
    • Cadence Design Systems, Inc., 555 River Oaks Parkway, San Jose, CA 95134, USA.
  • 14
    • 0019031277 scopus 로고
    • Switched-capacitor decimation and interpolation circuits
    • June
    • R. Gregorian and W. E. Nicholson, "Switched-capacitor decimation and interpolation circuits." IEEE Tran. Circuits Syst. CAS-27, pp. 509-514, June 1980.
    • (1980) IEEE Tran. Circuits Syst. , vol.CAS-27 , pp. 509-514
    • Gregorian, R.1    Nicholson, W.E.2
  • 21
    • 0004266734 scopus 로고
    • Cambridge University Press: Cambridge
    • Horowitz and Hill, The art of electronics. Cambridge University Press: Cambridge, p. 126, 1980.
    • (1980) The Art of Electronics , pp. 126
    • Horowitz1    Hill2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.