Meld Scheduling: A Technique for Relaxing Scheduling Constraints

International Journal of Parallel Programming

Volumn 26, Issue 4, 1998, Pages 349-381

  Abraham, Santosh G ^a   Kathail, Vinod ^a   Deitrich, Brian L ^b  

^a HEWLETT PACKARD LABORATORIES   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Compiler optimization; Global scheduling; Instruction scheduling; Instruction level parallel processors; Latency constraint propagation

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; CONSTRAINT THEORY; DATA STRUCTURES; PROGRAM COMPILERS; UNIX;

INSTRUCTION LEVEL PARALLEL (ILP) PROCESSORS; MELD SCHEDULING; NONINTERLOCKED PROCESSORS; VER LONG INSTRUCTION WORD (VLIW);

PARALLEL PROCESSING SYSTEMS;

EID: 0032138376     PISSN: 08857458     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1018746314457     Document Type: Article

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