Fast and processor efficient parallel matrix multiplication algorithms on a linear array with a reconfigurable pipelined bus system

IEEE Transactions on Parallel and Distributed Systems

Volumn 9, Issue 8, 1998, Pages 705-720

  Li, Keqin ^a,b   Pan, Yi ^a,c   Zheng, Si Qing ^d  

^a IEEE   (United States)

^b STATE UNIVERSITY OF NEW YORK   (United States)

^c University of Dayton   (United States)

^d Louisiana State University   (United States)

Author keywords

Compound algorithm; Linear array; Matrix multiplication; Optical pipelined bus; Reconfigurability; Strassen's algorithm

Indexed keywords

COMPUTATIONAL COMPLEXITY; DATA COMMUNICATION SYSTEMS; DIGITAL ARITHMETIC; MATHEMATICAL MODELS; MATRIX ALGEBRA; PARALLEL ALGORITHMS; PIPELINE PROCESSING SYSTEMS;

LINEAR ARRAYS; PARALLEL MATRIX MULTIPLICATION ALGORITHMS; RECONFIGURABLE PIPELINED BUS SYSTEMS; STRASSEN'S ALGORITHMS;

PARALLEL PROCESSING SYSTEMS;

EID: 0032137234     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/71.706044     Document Type: Article

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