A design study of a 0.25-μm video signal processor

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 8, Issue 4, 1998, Pages 501-519

  Dutta, Santanu ^a,b   O'Connor, Kevin J ^a,c   Wolf, Wayne ^a,d   Wolfe, Andrew ^a,e  

^a IEEE   (United States)

^b NXP SEMICONDUCTORS   (Netherlands)

^c NOKIA RESEARCH CENTER   (United States)

^d Princeton University   (United States)

^e S3 Inc   (United States)

Author keywords

Circuit simulation; Crossbar network; Design tradeoffs; Video signal processing; VLIW architecture

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; PARALLEL PROCESSING SYSTEMS; PERFORMANCE; PROGRAM COMPILERS; VLSI CIRCUITS;

CIRCUIT SIMULATION; CROSSBAR NETWORK;

VIDEO SIGNAL PROCESSING;

EID: 0032136125     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/76.709414     Document Type: Article

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