메뉴 건너뛰기




Volumn 41, Issue 3, 1998, Pages 216-218

A novel representation for two-pole feedback amplifiers

Author keywords

Amplifiers; Analog design; Feedback; Phase margin

Indexed keywords

CLOSED LOOP CONTROL SYSTEMS; ELECTRIC NETWORK SYNTHESIS; PARAMETER ESTIMATION; POLES AND ZEROS;

EID: 0032135951     PISSN: 00189359     EISSN: None     Source Type: Journal    
DOI: 10.1109/13.704548     Document Type: Article
Times cited : (12)

References (9)
  • 5
    • 0029263023 scopus 로고
    • An optimized compensation strategy for two-stage CMOS opamp
    • Mar.
    • G. Palmisano and G. Palumbo, "An optimized compensation strategy for two-stage CMOS opamp," IEEE Trans. Circuits Syst. I, vol. 42, pp. 178-182, Mar. 1995.
    • (1995) IEEE Trans. Circuits Syst. I , vol.42 , pp. 178-182
    • Palmisano, G.1    Palumbo, G.2
  • 6
    • 0031101679 scopus 로고    scopus 로고
    • A compensation strategy for two-stage CMOS opamp based on current buffer
    • Mar.
    • _, "A compensation strategy for two-stage CMOS opamp based on current buffer," IEEE Trans. Circuits Syst. I, vol. 44, pp. 257-262, Mar. 1997.
    • (1997) IEEE Trans. Circuits Syst. I , vol.44 , pp. 257-262
  • 9
    • 0025403342 scopus 로고
    • Considerations for fast settling operational amplifiers
    • Mar.
    • H. Yang and D. Allstot, "Considerations for fast settling operational amplifiers," IEEE Trans. Circuits Syst., vol. 37, pp. 326-334, Mar. 1990.
    • (1990) IEEE Trans. Circuits Syst. , vol.37 , pp. 326-334
    • Yang, H.1    Allstot, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.