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Volumn 15, Issue 3, 1998, Pages 112-118

Rapid hardware prototyping on RPM-2

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; DYNAMIC RANDOM ACCESS STORAGE; FIELD PROGRAMMABLE GATE ARRAYS; RAPID PROTOTYPING;

EID: 0032118253     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.706042     Document Type: Article
Times cited : (7)

References (12)
  • 1
    • 0027623456 scopus 로고
    • A Reprogrammable Gate Array and Applications
    • July
    • S. Trimberger, "A Reprogrammable Gate Array and Applications," Proc. IEEE, Vol. 81, No. 7, July 1993, pp. 1030-1041.
    • (1993) Proc. IEEE , vol.81 , Issue.7 , pp. 1030-1041
    • Trimberger, S.1
  • 2
    • 0025440459 scopus 로고
    • A Survey of Cache Coherence Schemes for Multiprocessors
    • June
    • P. Stenström, "A Survey of Cache Coherence Schemes for Multiprocessors," Computer, Vol. 23, No. 6, June 1990, pp. 12-24.
    • (1990) Computer , vol.23 , Issue.6 , pp. 12-24
    • Stenström, P.1
  • 3
    • 0029254268 scopus 로고
    • RPM: A Rapid Prototyping Engine for Multiprocessor Systems
    • Feb.
    • L.A. Barroso et al., "RPM: A Rapid Prototyping Engine for Multiprocessor Systems," Computer, Vol. 28, No. 2, Feb. 1995, pp. 26-34.
    • (1995) Computer , vol.28 , Issue.2 , pp. 26-34
    • Barroso, L.A.1
  • 5
    • 0023963509 scopus 로고
    • Synchronization, Coherence, and Event Ordering in Multiprocessors
    • Feb.
    • M. Dubois, C. Scheurich, and F.A. Briggs, "Synchronization, Coherence, and Event Ordering in Multiprocessors," Computer, Vol. 21, No. 2, Feb. 1988, pp. 9-21.
    • (1988) Computer , vol.21 , Issue.2 , pp. 9-21
    • Dubois, M.1    Scheurich, C.2    Briggs, F.A.3
  • 6
    • 0018152817 scopus 로고
    • A New Solution to Coherence Problems in Multicache Systems
    • Dec.
    • L. Censier and P. Feautrier, "A New Solution to Coherence Problems in Multicache Systems," IEEE Trans. Computers, Vol. 27, No. 12, Dec. 1978, pp. 112-118.
    • (1978) IEEE Trans. Computers , vol.27 , Issue.12 , pp. 112-118
    • Censier, L.1    Feautrier, P.2
  • 7
    • 3643095583 scopus 로고
    • An Integrated Methodology for the Verification of Directory-Based Cache Protocols
    • IEEE Computer Society Press, Los Alamitos, Calif.
    • F. Pong, P. Stenström, and M. Dubois, "An Integrated Methodology for the Verification of Directory-Based Cache Protocols," Proc. 1994 Int'l Conf. Parallel Processing, IEEE Computer Society Press, Los Alamitos, Calif., 1994, pp. I.158-166.
    • (1994) Proc. 1994 Int'l Conf. Parallel Processing
    • Pong, F.1    Stenström, P.2    Dubois, M.3
  • 8
    • 85041873394 scopus 로고    scopus 로고
    • Tech. Report No. CENG 97-28, Univ. of Southern California, Los Angeles, Dec.
    • M. Dubois et al., Rapid Hardware Prototyping on RPM-2: Methodology and Experience, Tech. Report No. CENG 97-28, Univ. of Southern California, Los Angeles, Dec. 1997; http://www.usc.edu/dept/ceng/dubois/RPM.html.
    • (1997) Rapid Hardware Prototyping on RPM-2: Methodology and Experience
    • Dubois, M.1
  • 10
    • 0029179077 scopus 로고
    • The SPLASH-2 Programs: Characterization and Methodological Considerations
    • IEEE CS Press
    • S.C. Woo et al., "The SPLASH-2 Programs: Characterization and Methodological Considerations," Proc. 22nd Int'l Symp. Computer Architecture, IEEE CS Press, 1995, pp. 24-36.
    • (1995) Proc. 22nd Int'l Symp. Computer Architecture , pp. 24-36
    • Woo, S.C.1
  • 12
    • 0002789786 scopus 로고
    • The S3.mp Scalable Shared-Memory Multiprocessor
    • IEEE CS Press
    • A. Nowatzyk et al., "The S3.mp Scalable Shared-Memory Multiprocessor," Proc. 1995 Int'l Conf. Parallel Processing, IEEE CS Press, 1995, pp. I.1-10.
    • (1995) Proc. 1995 Int'l Conf. Parallel Processing
    • Nowatzyk, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.