Two-quadrant CMOS analogue divider

Electronics Letters

Volumn 34, Issue 12, 1998, Pages 1164-1165

  Dualibe, C ^a,b   Verleysen, M ^b   Jespers, P ^b  

^a UNIVERSIDAD CATÓLICA DE CÓRDOBA   (Argentina)

^b UNIVERSITÉ CATHOLIQUE DE LOUVAIN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LINEAR INTEGRATED CIRCUITS; LINEAR NETWORK SYNTHESIS;

TWO QUADRANT ANALOG DIVIDERS;

DIVIDING CIRCUITS (ARITHMETIC);

EID: 0032099377     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19980861     Document Type: Article

References (5)

1. WANG, Z.: 'Current-mode CMOS integrated circuits for analog computation and signal processing: a tutorial'. Analog Integrated Circuits and Signal Processing, 1991, Vol. I, pp. 287-295
2. KACHAB, N., and ISMAIL, M.: 'Linearization techniques for nth-order sensor models in MOS VLSI technology', IEEE Trans. Circuits Syst., 1991, CAS-38, (12), pp. 1439-1450
3. TOUMAZOU, C., LIGEY, F.J., and HAIGH, D.G.: 'Analogue IC design: the current-mode approach' (Peregrinus Co., Stevenage, Herts., U.K., 1990)
4. BULT, K., and WALLINGA, H.: 'A class of analog CMOS circuits based on the square law characteristic of a MOS transistor in saturation', IEEE J. Solid State Circuits, 1987, SSC-22, (3), pp. 357-365
5. CZARNUL, Z.: 'Novel MOS resistive circuit for synthesis of fully integrated continuous-time filters', IEEE Trans. Circuits Syst., 1986, CAS-33, (77), pp. 718-721