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IEEE Transactions on Nuclear Science

Volumn 45, Issue 3 PART 1, 1998, Pages 833-837

Front-End Module Readout and Control Electronics for the PHENIX Multiplicity Vertex Detector

(4) Ericson, M N a,b Alien, M D a Boissevain, J a Britton, C L a

a OAK RIDGE NATIONAL LABORATORY (United States)

b LOS ALAMOS NATIONAL LABORATORY (United States)

Author keywords

[No Author keywords available]

Indexed keywords

LOGIC GATES; MULTICHIP MODULES; PARTICLE ACCELERATORS; READOUT SYSTEMS; TRIGGER CIRCUITS;

ARCNET INTERFACE MODULE; CONTROL ELECTRONICS; DATA COLLECTION INTERFACE MODULE; FIELD PROGRAMMABLE FIELD ARRAY; FRONT END MODULE READOUT; MULTIPLICITY VERTEX DETECTOR; TIMING AND CONTROL INTERFACE MODULE; TRIGGER INTERFACE MODULE;

PARTICLE DETECTORS;

EID: 0032097339 PISSN: 00189499 EISSN: None Source Type: Journal
DOI: 10.1109/23.682646 Document Type: Article

Times cited : (3)

References (8)

1
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- Kehoe, W. L., et al, PHENIX Conceptual Design Report. New York: Brookhaven National Laboratory, 1993.
- L., et Al, PHENIX Conceptual Design Report. New York: Brookhaven National Laboratory
- Kehoe, W.¹

2
- 33747241164
- 1996.
- J.S. Kapustinsky, et al., "A Multiplicity Vertex Detector for the PHENIX Experiment at RHIC," submitted to Proceedings of the 4th International Conference on Position Sensitive Detectors, Manchester, UK, Sept. 9-13, 1996.
- Et Al., "A Multiplicity Vertex Detector for the PHENIX Experiment at RHIC," Submitted to Proceedings of the 4th International Conference on Position Sensitive Detectors, Manchester, UK, Sept. 9-13
- Kapustinsky, J.S.¹

3
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- 283288.
- C.L. Britton, et al, "Design and Performance of Beam Test Electronics for the PHENIX Multiplicity Vertex Detector," ," IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, pp. 283288.
- Et Al, "Design and Performance of Beam Test Electronics for the PHENIX Multiplicity Vertex Detector," ," IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, Pp.
- Britton, C.L.¹

4
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- 374-378.
- M.S. Emery, et al., "A Multi-Channel ADC for Use in the PHENIX Detector", IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, pp. 374-378.
- Et Al., "A Multi-Channel ADC for Use in the PHENIX Detector", IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, Pp.
- Emery, M.S.¹

5
- 0031346084
- 1997 IEEE Nuclear Science Symposium.
- C.L. Britton, et al., "TGV32: A 32-Channel Preamplifier Chip For The Multiplicity Vertex Detector At PHENIX," presented at the 1997 IEEE Nuclear Science Symposium.
- Et Al., "TGV32: a 32-Channel Preamplifier Chip for the Multiplicity Vertex Detector at PHENIX," Presented at the
- Britton, C.L.¹

6
- 0026901628
- 1992.
- O.B. Milgrome, et al., "A 12 Bit Analog to Digital Converter for VLSI Applications in Nuclear Science," IEEE Trans. Nucl. Sei., Vol. 39, No. 4, pp. 771-775, 1992.
- Et Al., "A 12 Bit Analog to Digital Converter for VLSI Applications in Nuclear Science," IEEE Trans. Nucl. Sei., Vol. 39, No. 4, Pp. 771-775
- Milgrome, O.B.¹

7
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- 312-317.
- M.N. Ericson, et al, "Development Of A Front End Controller/Heap Manager for PHENIX," IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, pp. 312-317.
- Et Al, "Development of a front End Controller/Heap Manager for PHENIX," IEEE Trans. Nucl. Sei., Vol. 44, No. 3, June 1997, Pp.
- Ericson, M.N.¹

8
- 0030171816
- 1629-33.
- M.N. Ericson, et al, "A Flexible Analog Memory Address List Manager for PHENIX," IEEE Trans. Nucl. Sei., Vol. 43, No. 3, June 1996, pp. 1629-33.
- Et Al, "A Flexible Analog Memory Address List Manager for PHENIX," IEEE Trans. Nucl. Sei., Vol. 43, No. 3, June 1996, Pp.
- Ericson, M.N.¹

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