A new PLL with fast settling time and low phase noise

Microwave Journal

Volumn 41, Issue 6, 1998, Pages 94-108

  Zuta, Marc ^a,b,c  

^a ILATRON Ltd   (Israel)

^b TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^c Optical Technology and Networking Group Israel   (Israel)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DIGITAL SIGNAL PROCESSING; DIGITAL TO ANALOG CONVERSION; FREQUENCY HOPPING; LOW PASS FILTERS; SPURIOUS SIGNAL NOISE; VARIABLE FREQUENCY OSCILLATORS;

DIRECT DIGITAL SYNTHESIS; INTERNET COMMUNICATIONS;

PHASE LOCKED LOOPS;

EID: 0032097314     PISSN: 01926225     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (11)

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3. T. Endo et al., "Chaos from Phase-locked Loops," IEEE Transactions on Circuits and Systems, Vol. 35, No. 8, August 1988, pp. 987-1003.
4. T. Endo et al., "Chaos from Phase-locked Loops - Part II," IEEE Transactions on Circuits and Systems, Vol. 35, No. 2, February 1989, pp. 255-263.
5. A.B. Williams, Electronic Filter Design Handbook, McGraw-Hill Book Co.
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7. Analog Devices Inc., ADSP-2100 Family User's Manual.
8. Analog Devices Inc., ADSP-2100 Family/Assembler Tools and Simulator Manual.
9. Andrew J. Viterbi, "A Vision of the Second Century of Wireless Communication," Microwave Journal, Vol. 38, No. 10, October 1995, pp. 64-72.
10. Kamilo Feher, Digital Communications - Satellite/Earth Station Engineering, Chapter 7, Prentice-Hall Inc.
11. Bill Gates, The Road Ahead, Chapter 5, Penguin Books.