A novel two-step etching to suppress the charging damages during metal etching employing helicon wave plasma

IEEE Electron Device Letters

Volumn 19, Issue 6, 1998, Pages 183-185

  Cheng, Huang Chung ^a   Lin, Wendy ^a   Kang, Tzong Kuei ^a   Perng, Yean Chyi ^a   Dai, Bau Tong ^b  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b NATIONAL NANO DEVICE LABORATORIES   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALUMINUM; LEAKAGE CURRENTS; METALLIC FILMS; MOS DEVICES; PLASMA APPLICATIONS;

HELICON WAVE PLASMAS; PLASMA CHARGING DAMAGES;

PLASMA ETCHING;

EID: 0032095128     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.678537     Document Type: Article

References (6)

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2. H. Hoga, T. Orita, T. Yokoyama, and T. Hayashi, "Charge build-up in magnetron-enhanced reactive ion etching," Jpn. J. Appl. Phys., vol. 30, no. 11B, pp. 3169-3173, 1991.
3. F. Shone, K. Wu, J. Shaw, E. Hokelek, S. Mittal, and A. Haranahalli, "Gate oxide charging and its elimination for metal antenna capacitor and transistor in VLSI CMOS double layer metal technology," in Symp. VLSI Tech. Dig. Papers, 1989, pp. 73-74.
4. T. Watanabe and Y. Yoshida, "Dielectric breakdown of gate insulator due to reactive ion etching," Solid State Technol., vol. 27, no. 4, pp. 263-266, 1984.
5. J. C. King and C. Hu, "Effect of low and high temperature anneal on plasma-induced damage of gate oxide," IEEE Electron Device Lett., vol. 15, pp. 475-476, Nov. 1994.
6. M.-R. Lin, P. Fang, F. Heiler, R. Lee, R. Rakkhit, and L. Shen, "Characterization and optimization of metal etch processes to minimize charging damage to submicron transistor gate oxide," IEEE Electron Device Lett., vol. 15, pp. 25-27, Jan. 1994.